The 5th Accelerating AI Workshop, orchestrated by CMC Microsystems, functions as a comprehensive platform, spotlighting pioneering advancements in all facets of AI application development and enabling technologies. Emphasizing Multimodal Generative AI and Edge AI Transformations, the workshop tackles the need for Energy-centric Edge AI Hardware, delving into topics like at-memory spatial architecture, domain-specific neural processors, complex memory hierarchy, and massive parallelism. The agenda also offers insights into efficient machine learning mapping tools, intending to navigate the evolving landscape of AI technologies across diverse application domains.
Topics
- ML applications: Generative AI, Computer Vision, NLP, EDA and CAD, etc.
- Novel AI HW: GPUs, FPGAs, and Custom Accelerators
- Software stack: libraries, compilers, and ML frameworks
- ML Benchmarking on Emerging Hardware
- AI’s latest trends in chip design and commercialization
This workshop will
- Promote innovation, adoption and early access to advanced technologies, including silicon and systems for accelerating AI workloads from the cloud to the edge.
- Share insights and experiences with others; explore collaboration opportunities and connect leaders from the industry to AI researchers and startups.
- Influence technology selection (roadmap) and development activities of emerging AI trends.
Target Attendees
The workshop is open to professors, research associates and graduate students at Canadian universities, as well as industrial attendees who wish to provide input and advice.
Schedule
Date | Time | Location |
May 8, 2024 | 1:00 pm to 5:00 pm EDT | Online |
Agenda
Time (PM) | Presenter | Organization | Title |
1:00 – 1:10 | Yassine Hariri | CMC Microsystems | Welcome and opening remarks |
1:10 – 1:30 | Pierre Paulin | Synopsys | Generative AI on the Edge |
1:30 – 1:50 | Tom Stesco | Tenstorrent | Tenstorrent Open Ecosystem for Accelerating AI Compute |
1:50 – 2:10 | Jonathan Dursi | Nvidia | Accelerating Bigger, More Complicated AI Workloads with NVIDIA GH200 Grace Hopper Superchip |
2:10 – 2:30 | Flo Wohlrab | OpenHW Group | Industrial grade open source RISC-V CPU IP |
2:30 – 2:40 | Break | ||
2:40 – 3:00 | Bill Jenkins | Untether AI | Energy-Efficient AI Inference Acceleration with Untether AI |
3:00 – 3:20 | Stephen Su | ARM | Transforming AI with Arm Helium Technology and Reference Design: Unlocking the Potential of Edge AI |
3:20 – 3:40 | Hajar Abedifirouzjaei | University of Waterloo | Next Generation AI Resident Activity Monitoring |
3:40 – 4:00 | Andreas Moshovos | University of Toronto | Capitalizing on a Decade of Machine Learning Accelerators: SW/HW Assists for Training and Inference |
4:00 – 4:20 | Warren Gross | McGill University | Hardware for Stochastic Simulated Annealing to Solve Large-Scale Combinatorial Optimization Problems |
4:20 – 5:00 | Open Discussion | ||
5:00 | Closing remarks |
Organizer
Yassine Hariri, Hariri@cmc.ca, CMC Microsystems
Over 15 years of experience in advanced computing systems from the cloud to the very edge, with a focus on artificial intelligence workloads acceleration, FPGA based prototyping, software stack, and domain-specific hardware architectures. Currently leading projects related to the specification, development, implementation, deployment, and support of the next generation of advanced computing infrastructure mainly FPGAs, GPUs, and Custom Hardware for AI applications. Dr. Hariri earned his B.A.Sc. in Computer Engineering from Ecole Marocaine des Sciences de l’ingénieur, Casablanca, Morocco, in 1998, and the M.S. and Ph.D. degrees from Ecole de Technologie Supérieure (ETS), Montreal, QC, Canada, in 2002 and 2008, respectively, all in electrical engineering.